Bus fault handler doesn't need to be naked

When it was a naked call, if it doesn't jump somewhere, it just
falls through to whatever code happens to be next.  Which happened to
re-enable bus faults - meaning that only the first fault was being
ignored.  That's a problem for flash protection on STM32, where writes
to potentially-locked key registers come in pairs.

BUG=chrome-os-partner:19564
BRANCH=spring
TEST=manual, on pit:

  1. Hack in a igbusfault console command to call ignore_bus_fault()
  2. igbusfault 1
  3. ww 0x40023c0c 0xdeadbeef -> no fault
  4. ww 0x40023c0c 0xdeadbeef -> still no fault
  5. igbusfault 0
  6. ww 0x40023c0c 0xdeadbeef -> exception and reboot

Change-Id: I5cf74b06a76ebf0176a2905924be87b3d1c825ce
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55572
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Support write protect GPIO on pit

Daisy doesn't have a write protect signal, so emulate it as a fake
signal which is always low; this maintains the current behavior on
daisy.

BUG=chrome-os-partner:15613
BRANCH=none
TEST=flashinfo shows gpio not asserted
     then short across the WP screw and flashinfo shows it asserted

Change-Id: I329424efe1c3b065976e17395e2bf9588cdce88c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51500
Reviewed-by: Vic Yang <victoryang@chromium.org>

Fix detecting inconsistent flash state

If the last bank of flash in a region was protected and the rest of
the region was unprotected, flash_get_protect() shoud return the
INCONSISTENT flag, but this wasn't being properly detected.

Port the existing fix from STM32F.

BUG=chrome-os-partner:19529
BRANCH=none (not likely worth porting to link)
TEST=protect just the last bank of RW firmware, then flashinfo

    > flashinfo
    Physical: 128 KB
    Usable:   128 KB
    Write:     64 B
    Erase:    256 B
    Protect: 4096 B
    Flags:   all_now INCONSISTENT
    Protected now:
        ........ ........ ........ .......Y

Should have the inconsistent flag set.

Change-Id: I407737cef42748da6b3ec40d84968c76ee07972c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51498
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Adjust hooks test timing

We unit test to be as less time sensitive as possible. This change
adjusts the timing in the test to ensure we have enough time for context
switching. Otherwise we get false negative sometimes.

BUG=chrome-os-partner:19236
TEST=Repeatedly run the test and see it passes.
BRANCH=None

Change-Id: I90c1200641cb02f95bd7631bd2870ad21b21bffc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51562
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Revert "Revert "Add thermal engine test""

This reverts commit 89e688a3325e91d3c59ac639f04f2c91019c9b10.

Time-scaling is added back. We can run this test now.

BUG=chrome-os-partner:19236
TEST=Pass the test.
BRANCH=None

Change-Id: Id3dcec6fc12489f5f0602de91c6560a8dfbef9af
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51551
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Revert "Revert "Scale timer for emulator""

This reverts commit c58c01b14cd45550991be1624146bc813092d202.

Let's add time scaling back, but keep the default scale to 1. The
emulator behavior should be entirely the same. If a test need to be
speeded up, the scale can then be set for that test only.

BUG=chrome-os-partner:19235
TEST=Pass all tests.
BRANCH=None

Change-Id: I648780577a1ae2f964c30c71077ccf9bf38b9735
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51550
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

haswell: bring down EC_EDP_VDD_EN with PP330_DX

The display rail is generated from the PP3300_DX rail, but it
is enabled by the EC_EDP_VDD_EN signal. Therefore, bring down
the EC_EDP_VDD_EN signal before bringing down the PP330_DX
rail. Additionally, always set the EC_EDP_VDD_EN signal based
on the PCH_EDP_VDD_EN in the x86 power interrupt. The reasoning
is so the signal doesn't indavertently remained set.

BUG=chrome-os-partner:19398
BRANCH=None
TEST=booted and resumed

Change-Id: I43c2306f05d144b7dea243bafb5922118be1fe39
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51524
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

haswell: bring up/down WLAN rail properly

The PP3300_WLAN rail was not being controlled. Fix this by bringing
up the rail in S3->S0 transition and bring it down in S0->S3
transition. This current sequencing will not allow the WLAN to
wake from suspend at the moment. To do that we'd need to move this
sequencing to the S5<->S3 transitions.

BUG=chrome-os-partner:19507
BRANCH=none
TEST=Brought up board. Noted WLAN card in lsusb and lspci.

Change-Id: I48e7610fa4f0471a2869933f2df5d2c7c525b155
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51483
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Set SPI lines to inputs when AP is off

When AP is off, turn off pullup on NSS, and set MISO to an input so
the SPI module won't drive it high if the last sent bit was a 1.  This
reduces leakage when the AP is off.

This patch also fixes a bug where gpio_set_alternate_function() set
the wrong pins to normal-mode when func=-1; that didn't hit anything
else because that functionality wasn't used on STM32 until now.

BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot pit

On EC console, with AP on, 'rw 0x40020000' returns
read 0x40020000 = 0x6569aa20  <- must have 0x____aa__

Then 'apshutdown' and 'rw 0x40020000' returns
read 0x40020000 = 0x65690020  <- must have 0x____00__

The 'power on' and AP turns back on.  At u-boot prompt,
'sspi 2:0 256 9f00000000' returns
FDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFDFEEC010001
(some number of 0xFD's followed by FEEC...)  This shows SPI
functionality is restored when AP is powered back on, and not
just at init time.

Change-Id: Ia3cd3e0bc222dc663d635509918fa3d383fd7971
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51182
Reviewed-by: Simon Glass <sjg@chromium.org>

pit: Add more delay for proper power_on sequence

It makes delay between 3.3V_EN and PMIC_ON
So we are now 5V EN -> 2ms Delay -> 3.3V EN -> 2ms Delay -> PMC3_ACOK

BUG=chrome-os-partner:19305
BRANCH=none
TEST=Using osiloscope, See until PMC3_ACOK is far from P3.3V_AUX as 5ms

Change-Id: I65bfece28f55edf4f5640fe411bd57caaaaa5e1d
Reviewed-on: https://gerrit.chromium.org/gerrit/50449
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>

lm4: break out board-specific fan/tach pin config

The current lm4 pwm module was using board-specific
pins during this configuration. Move the implementation
of configure_fan_gpios() to the board-specific files
so that the pin configuration policy isn't a part of the
common infrastructure.

BUG=chrome-os-partner:19504
BRANCH=none
TEST=successfully booted slippy with backlight turning on in OS.

Change-Id: I325f1ac4639b4a78d8b860df7a8b688ca385b71b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51471
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Revert "Add thermal engine test"

Time-scale functionality is temporarily reverted and this test
is now taking too long. Revert this test now. Will add it back
when we solve the time-scale issue.

This reverts commit d9cf88b35ad211d873f48b41fd985e22ff049b83

Change-Id: Id9ce1071eb2114dd6968d3df9f0bce395edaeef6
Reviewed-on: https://gerrit.chromium.org/gerrit/51482
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Stéphane Marchesin <marcheu@chromium.org>

Revert "Scale timer for emulator"

This is causing instability on buildbot. Let's revert until we can make it more stable.

This reverts commit 3615ac4c0b6141f9d5a3fb008d09f6792155815c

Change-Id: I0bd65832cc3706a24284ada80e2fb5102fa705cf
Reviewed-on: https://gerrit.chromium.org/gerrit/51479
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Add console command to force enable console

When system is locked, the console is disabled. However, we need console
for debugging and testing. This CL uses a bit from back-up register to
indicate if the console should always be enabled. (This bit is currently
used by fake WP, which is removed in this CL.) With this, we can set
this bit with console command 'forceen 1' to ensure console is never
disabled.

To prevent device shipped in this state, the chip name is postfixed with
'-unsafe' so that the device is not able to pass HWID check.

BUG=chrome-os-partner:19293
TEST=Manual
BRANCH=spring

Change-Id: I88556e973ca542c1bdc27ba64988718291e01a26
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51086
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

haswell: move 5V rail enable/disable actions

The 5V rail should be enabled on S5->S3 transitions and
disabled on S3->S5 transitions.

BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transitions: S0,S3,S5,G3

Change-Id: If9fd7ef16f015136238dd18f64602ecf33d9ec4a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51359
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

haswell: fix S3 resume path

The PROCPWRGD signal is not well documented. It's not known if
it is an input or an output. Emperically it was discovered that
driving this pin during the resume path causes resume to fail.
Therefore, ignore the pin by setting it to an input.

BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from S0 to S3 and back to S0

Change-Id: I55dc16c75c286af06806e2513197f0bb2c7b9d04
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51358
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Relax timing constraints in hooks test

Current timing constraints are too tight that the test sometimes fails
when it shouldn't.

BUG=chrome-os-partner:19236
TEST=Pass the test
BRANCH=None

Change-Id: Ib94ff44691ba36f14dbf02319d0371770b5ece5d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51250
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Add thermal engine test

BUG=chrome-os-partner:19236
TEST=Pass the test.
BRANCH=None

Change-Id: I1c96437e1fb3492faa5352383f852dc1d2718ace
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51248
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

spring: Update PMU ADC constant

The current sense resistor has changed. Update constant here to reflect
the new values for DVT1.

BUG=None
TEST=Build Spring
BRANCH=Spring

Change-Id: Ib27c45cef569fa758db2fbb428150c8c2b6732ef
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49892
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Minor tweaks to haswell power sequencing

- pass through the eDP VDD enable from PCH
- Bring up suspend rail after DPWROK and before RSMRST,
as indicated for deep sleep sequencing
- de-assert CPU_PGOOD on S0->S3 transition, it was
getting left enabled

BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from G3 to S0 and back to G3

Change-Id: Ie711275d6121edccff60b2de08b71575d2d035b7
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51154
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

do not store the keyboard state on the stack

As our stack for the keyboard scanning task might be small (256 bytes on
STM32), we store the full keyboard state in a global instead of the
stack to avoid consuming 16 bytes there.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:19389
TEST=run on Spring with CONFIG_OVERFLOW_DETECT and see that the KEYSCAN task
is now consuming 248 bytes of stack instead of 264.

Change-Id: I2dd7815f36e6807e7b9e88d59f8fd8a14b1988ab
Reviewed-on: https://gerrit.chromium.org/gerrit/51028
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>

Add hook test

Test of hook functionality.

BUG=chrome-os-partner:19236
TEST=Pass the test
BRANCH=None

Change-Id: I4700f3061edd0707932e935a719fc73c3976892e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50957
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Show run time of unit tests

This is useful for finding out which test runs for too long.

BUG=chrome-os-partner:19235
TEST=Run tests and see run time logged.
BRANCH=None

Change-Id: I5cb6727b2e1017fce1107e4892c1898e66598492
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51105
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Redirect emulator output to stderr if a test fails

If a test fails, redirect emulator output to stderr so that it shows up
even when V=1 is not set.

BUG=chrome-os-partner:19235
TEST=Manual
BRANCH=None

Change-Id: I6d8e05eaa222ebe043556bfcd3f63ca7e27c2721
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51097
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

slippy: Basic power sequencing

Still some work to do here but this now works.

NOTE: This makes the system behave like a normal
cros device where the power is applied automatically.
For some (other, unknown) reason the "reboot ap-off"
is not passing flags correctly to keep it off.

BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from G3 to S0

Change-Id: I694136b9611e18ac8fb7b1e960bd10caa258ce28
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51077
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Scale timer for emulator

The timer is the only source of timing for the emulator. This means we
can make it go faster without breaking the tests. This CL sets the
default scale to be 3x faster than normal time.

BUG=chrome-os-partner:19235
TEST=Pass all tests. Check the tests run faster.
BRANCH=None

Change-Id: Ib9035884b34f41c4e9aa2206284b5f1ec8fc0d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50956

spring: Fix a bug that ID_MUX is never switched back

If the user unplug video dongle before it is detected and handled, we
may be stuck with ID_MUX=1 and interrupt from TSU6721 disabled. This
essentially breaks charging.

BUG=chrome-os-partner:18997
TEST=Build and check charging port still works.
BRANCH=spring

Change-Id: I93e69287d07947fef743b4674857e52c26513835
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50969
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

spring: Pull more current from video dongle

We cannot know how much current we can pull from video dongle, so let's
just try to pull as much as possible up to 2A.

BUG=chrome-os-partner:19324
TEST=Plug in video dongle and see 3.3V output.
TEST=Plug in video dongle with supplied charger, and see 50% PWM duty
cycle.
TEST=Plug in video dongle with normal charger, and see 70~80% PWM duty
cycle.
BRANCH=spring

Change-Id: I8b503f886fcafaa11e6757a5059ce673a8ed53cc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50963
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

slippy: Enable internal pullup for recovery pin

The recovery pin input from servo is open drain and needs
an internal pullup enabled so it is not always low.

BUG=chrome-os-partner:19398
BRANCH=none
TEST=manual: ensure rec_mode can be turned off

$ dut-control rec_mode:off rec_mode
rec_mode:off

Change-Id: I387a53eb5b64bb0bf3a87fc47b5cca9b2063f6a9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50993

Clarify help text for dumb USB port power control

The help text says to pass 0 or 1 for the mode but
the code only accepts "on" or "off".

Fix up the help text to match and have the display
output for the port status also use on/off so it is
consistent with the input.

BUG=chrome-os-partner:18825
BRANCH=none
TEST=manual: verify "usbchargemode 0 on" works as
it is explained in the help text.

Change-Id: Ib32dc68af93989d277aa84a1cb53ae9b66a8b595
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50838

LM4: Support configurable host UART interface

Slippy uses UART2 instead of UART1 and so the EC needs
to be able to tolerate having the host use a different
interface.  There are of course many ways to accomplish
that but this approach adds two config variables to specify
the host uart and the host uart irq.

The UART port setup is split out to allow them to be
configured separately rather than needing to be adjacent
in a for loop.

The interrupt functions were renamed (to ec and host) in
order to indicate which interface they are responsible for.

BUG=chrome-os-partner:19356
BRANCH=none
TEST=boot slippy and see host serial output

Change-Id: I1913ff3d650f329224c9654eee7bb7412fae5402
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50837

Clean up SPI GPIOs

SPI is always enabled on pit, so remove #ifdefs

SPI1_CLK was aliased to AC_STATUS, which is left over from snow and
doesn't exist on pit.  That caused it to be driven high briefly during
EC boot.

Also set SPI pins for 40MHz speed so we can try faster SPI clock.

BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot system; sspi 2:0 256 9f prints a bunch of FDs then FEEC010001

Change-Id: I10352cff3669d6a087939d9d8e302d70708e9ee3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51023
Reviewed-by: Doug Anderson <dianders@chromium.org>

Tidy comments for I2C passthru message

No code changes; just fix a few comments.

BUG=chrome-os-partner:18778
BRANCH=none
TEST=build code

Change-Id: I7ed32b5af01a6dbd401334175b5a1b5b4786cac7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51017
Reviewed-by: Doug Anderson <dianders@chromium.org>

slippy: Make EC_RCIN_L pin output and high by default

This is causing the host to reset because this pin is
going low when it is left as open drain, despite having
a 3.3V pullup.

BUG=chrome-os-partner:19355
BRANCH=none
TEST=manual: boot on slippy without RCIN# causing reset

Change-Id: I59e9316e85ce618edc84c7dd988d70ea4de1e71a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50836

Slippy: Changes needed to boot EC without bricking.

This commits the hacks made during board bringup. Bugs can be filed and
fixed based on this starting point.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Try it and see.

Change-Id: Ia663eaf9a357633873b1b5d5cc6dbdda63513082
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50875
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Implement I2C passthru command

This is a revised version of passthru which more closely resembles the
kernel interface.  It allows multiple read/write messages in a single
transaction, and sends back one accumulated result.

BUG=chrome-os-partner:18778
BRANCH=none
TEST=On link, from root shell:
    ectool i2cxfer 0 0xb 6 0x21
    Read bytes: 0x05 0x41 0x52 0x52 0x4f 0x57

(I did not actually run this with the updated code)

On pit, in U-Boot:

Read i2c values:
Peach #  crosec i2c md 48 0
0000: 00 00 3e 00 12 20 4b bf ff ff 20 00 1e 1e 1e 1f    ..>.. K... .....
Peach #  crosec i2c md 48 0 20
0000: 00 00 3e 00 12 20 4b bf ff ff 20 00 1e 1e 1e 1f    ..>.. K... .....
0010: 1f 1f 1f 1f 1f 1f 20 00 00 07 00 00 00 00 00 00    ...... .........

Update value at offset 10:
Peach #  crosec i2c mw 48 10 4
Peach #  crosec i2c md 48 0 20
0000: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f    ..>....... .....
0010: 04 1f 1f 1f 1f 1f 20 00 00 07 00 00 00 00 00 00    ...... .........
Peach #

On pit, in kernel:

localhost ~ # i2cdetect -y -a -r 20
 0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- UU -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --

localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f    ..>.?.???. .????
10: 1f 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00    ?????? ..?......
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

localhost ~ # i2cset -f -y 20 0x48 0x10 0
localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f    ..>.?.???. .????
10: 00 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00    .????? ..?......
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

localhost ~ # i2cset -f -y 20 0x48 0x10 0x1f
localhost ~ # i2cdump -f -y 20 0x48
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 3e 00 12 00 0b 1f 1f ff 20 00 1e 1e 1e 1f    ..>.?.???. .????
10: 1f 1f 0e 1f 1f 0e 20 00 00 07 00 00 00 00 00 00    ?????? ..?......

Change-Id: I14d47e1712828f726ac5caddc4beede251570ad3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Updated to simplify protocol:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49958
Commit-Queue: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>

Add power button test

This tests power button notification and debouncing.

BUG=chrome-os-partner:19236
TEST=Pass all tests
BRANCH=None

Change-Id: Ief8bc24a8725e01734d84e76ab4b6ae0506b811f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50524
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Put test utility macros in header

Several test utility macros have been duplicated across tests. Let's put
them in a single place.

BUG=chrome-os-partner:19236
TEST='make runtests', 'BOARD=spring make tests'
BRANCH=None

Change-Id: Ib0c9f829715425cc23e33b8ef456b17dfadab13c
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50513
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Speed up mutex and kb_scan test

The current delay is unnecessarily long. This CL shortens the delay.

BUG=chrome-os-partner:19236
TEST='make runtests'
BRANCH=None

Change-Id: Ica07458e7ae15cf28c3482b6df96df66c0d45182
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50487
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

spring: Hard-limit DCP current at 1.5A

The spec suggests we cannot reliably go over 1.5A and gracefully
recover. Let's avoid going over that limit.

BUG=chrome-os-partner:19267
TEST=Build spring
BRANCH=spring

Change-Id: I07411ff3ce4107e0289c5af5365ef5a23fd23e4e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50321
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

i2c: Allow for i2c "ping" that's a write of 0 bytes

The i2cdetect command on Linux likes to probe by doing a write of 0
bytes.  Rather than always returning success because there was nothing
to write, let's actually implement this command.

At the moment we only implement for the stm32l.  We also don't try to
implement the "read of 0" bytes since I don't think anyone uses that.

BUG=chrome-os-partner:18778
BRANCH=none
TEST=i2cdetect -y -a 20 now detects the right devices

Change-Id: Ia159ce9b8c957d5cd11f187f1a179ca5967bf96f
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50009
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

i2c: stm32l: Fix i2c reads of sizes other than 1

The STM32L manual has a whole section on i2c master reads and
describes the correct method for receiving exactly 2 bytes and more
than 2 bytes.  We weren't following those instructions and thus larger
transfers weren't working.

BUG=chrome-os-partner:19265
BRANCH=none
TEST=i2cxfer r16 0x90 0
...doesn't fail
TEST=i2cxfer r 0x90 0
...doesn't fail
TEST=Use pydevi2c and test some commands:
>>> tps = I2CDevice(20, 0x48)
>>> [hex(x) for x in tps.Get(0, 20)]
['0x1e', '0x0', '0x3e', '0x0', '0x12', '0x20', '0x4b', '0xbf',
 '0xff', '0xff', '0x20', '0x12', '0x1e', '0x1e', '0x1e', '0x1f',
 '0x1f', '0x1f', '0x1f', '0x1f']

Change-Id: Ifaab6d8b700e099bcd9c374c70fca0983858ed3f
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50229
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

Fix host command in 64-bit executable

On 64-bit platform, arrays should be aligned to 8 bytes. Also, change
the order of host_command fields so that it's packed on both 32-bit and
64-bit platforms.

BUG=chrome-os-partner:19257
TEST=Pass all tests. Print out and check the content of host commands.
BRANCH=None

Change-Id: I350a903bc11562d6d205c402548942f8967b75a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50467

Add lid switch test and enable kb_mkbp test

BUG=chrome-os-partner:19236
TEST=Pass both tests
BRANCH=None
CQ-DEPEND=CL:50467

Change-Id: I59cc407c2d1bf7f549ff9c46226cf7fa60fe7157
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50466

spring: Improve charging current control

This includes:
  - Increase overcurrent retry count from 1 to 2.
  - Mark overcurrent event regardless of what current PWM duty cycle is.
  - PWM duty cycle settles faster.
  - PWM duty cycle starts from ~100%.

BUG=chrome-os-partner:19001, chrome-os-partner:19037
TEST=Manual
BRANCH=spring

Change-Id: Idf007fb589fde3baef6c8975dfa1f2fc1ec6e95d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50262
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Use uintptr_t when converting integer from/to pointer

Perviously we use uint32_t for this, but this doesn't compile for 64-bit
environment (and likely doesn't for 16-bit either.) Use uintptr_t so that
we don't get size mismatch errors.

BUG=chrome-os-partner:19257
TEST=Run host emulated tests
BRANCH=None

Change-Id: I3cd66a745fa171c41a5f142514284ec106586acb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50358
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

stm32f: Set ADC single read timeout

If an ADC read fails and EOC bit is somehow never set, we will be stuck
in the read function holding mutex lock forever, which is really bad.
Let's set a timeout for this.

BUG=chrome-os-partner:18997
TEST=Boot Spring. Check ADC works.
BRANCH=spring

Change-Id: I19b108326f34f380497606fe92eabfaf0a778bb4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50338
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

spi: Fix OOBE in bounds-checking the reply

There was an off-by-one error in bounds checking the reply.  You could
trigger it with pydevi2c with:

>>> tps = I2CDevice(20, 0x48, force=True)
>>> tps.Get(0, 249)

The EC would show:
  ASSERTION FAILURE 'msg_len < sizeof(out_msg)' in reply() at
  chip/stm32/spi.c:184

BUG=chrome-os-partner:18778
BRANCH=none
TEST=Run the above commands and see no error.

Change-Id: I9789405a9d70c5dc3fa237504fea8f46a139386c
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50254
Reviewed-by: Simon Glass <sjg@chromium.org>

Fix and enable SPI for pit

I've simplified the SPI module, since we only ever use SPI1 (and there
were already a number of places which assumed this was true).
Somewhere along the way I fixed a number of problems keeping the code
from compiling and working on STM32L.  The code isn't currently used
anywhere else, but should still work there (that is, I don't think I
broke it working on STM32F if you re-enable it on some STM32F
platform).

BUG=chrome-os-partner:19073
BRANCH=none
TEST=from u-boot console, sspi 2:0 64 9f0000
     u-boot prints: FDFDFDFDFDFDFDFD
     ec prints: [193.740912 HC 0x9f][193.741141 HC err 1]

[sjg: gpio optimization back in for now]
[dianders: add comment as rspangler requested; update SOBs]

Change-Id: Ib9419403e4e44dadc1f17681e48401882cb49175
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49684

Add persistent storage for emulator

This is needed for non-volatile register emulation. Also, this can be
used to implement system jump or reset flags.

BUG=chrome-os-partner:19235
TEST=Run utils test. Check persistent storage file exists.
BRANCH=None

Change-Id: I699f95718ef6f5de6c3bbb4e37619ee015fb6c4a
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50313
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Pthread-based emulator for unit testing

This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.

BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None

Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Add test for keyboard MKBP protocol

A test that check keyboard MKBP module using keyboard scanning module and
host commands.

BUG=chrome-os-partner:19236
TEST=Pass the test
BRANCH=None

Change-Id: Ic22a2c8f3069d8e72c1222882073d428b733bca3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50132

spring: Fix S3 USB charging bug

The EC currently assumes the AP only provides USB power during S0, which
is incorrect. This CL adds S3 so that it behaves when the device is
suspended.

BUG=chrome-os-partner:19190
TEST=Suspend and unplug power. Doesn't hear clicking sound.
BRANCH=Spring

Change-Id: Ice1421bda55b2fee408ba062ed3de7a697ccd0c8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50093
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Define slippy GPIOs, make power sequencing task do nothing.

This specifies the Slippy GPIOs. Because the power controls are completely
different from Link, we have to gut the power sequencing task to do nothing.
For bringup and test, we'll just manually set and get the GPIOs until we
know exactly what we need to do.

This is where the fun starts...

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Built everything, Link still works.

Change-Id: Ic1ce1d4085298f49dd98d99e81e04835eca5f11c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50004

Slippy uses dumb USB ports, not smart ones.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Change-Id: I87459c177b8ae41b68e7157f26843eaf5ed93c60
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49975
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Remove Link peripherals from Slippy board

Temp sensors, I2C devices, ADC inputs, and keyboard GPIOs are all different.
This removes the things we don't need, connecting some of the things we
will.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=none

Doesn't break Link.

Change-Id: Ifb9775d921f6e9952497bffa98d405353ed4df71
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49964
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Disable the charger task for Slippy bringup

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Change-Id: Idbcd297e3f77c02539dcb215bf8c60b1bcfb2d92
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49933

Add some ifdefs to distinguish between Link and Slippy

I'll still need to decide what to do differently for Slippy, but for now
let's just identify the places where there will likely be a difference.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Link still works.

Change-Id: I950f0e5356ccf9838f2140d853122235f884e34f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49931

Support power button on slippy, make it compile again.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=none

Change-Id: If20ebaf8e718bc24d61a976026586445ccb6685e
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49914

Fix I2C port configuration on pit

1) Port needs to be open-drain.  Missed this when porting from STM32F
because open-drain and alternate function are set in the same register
on STM32F and are different regs on STM32L.

2) Queue a stop condition if a transaction failed, so the clock goes
back high.

BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan finds both the PMU at 0x90 and the battery at 0x16

Change-Id: I708b925e4e30da9d5864b74641b1cbe90c9313fe
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49898
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Split the USB port power control into smart and dumb versions.

Also renaming to avoid confusion as to what's being charged.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Build everything, Link still works.

Change-Id: I4205a1210c7dfe57cfbbdd740970ef57e6a011b8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49775
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Disable i2c for mccroskey. It's busted, but we don't care.

BUG=none
BRANCH=none
TEST=manual

make BOARD=mccroskey

Change-Id: Ide8d84d262a658d5c7fd33dec73353bc6ec797da
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49771
Reviewed-by: David Hendricks <dhendrix@chromium.org>

spring: Implement battery cut-off command

BUG=chrome-os-partner:18818
TEST='ectool batterycutoff' on Spring.
BRANCH=spring

Change-Id: Idf315562930744ae1e7425d6e15915b0477c2343
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49651
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Re-enable charging task on pit

Now that I2C works, we can re-enable the charging task to debug
battery charging.

BUG=chrome-os-partner:18657
BRANCH=none
TEST=in EC log, should see battery state messages

Change-Id: I600d0152ba416c13420ce853b55206afba9f6cec
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49649

Rename REINIT to IDLE0 in TPS65090 charge state machine

The state REINIT in TPS65090 charge state machine is more like IDLE0
state in charge_state.h. Rename it so that it's less confusing and
easier to merge the two state machines in the future. Also move the
state name definition to the header file.

BUG=chrome-os-partner:18914
TEST=Boot Spring
BRANCH=None

Change-Id: I116438fedc46ff188dfb6a3964795715b5af4d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49732
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Monitor video detachment with ADC watchdog

This eliminates a per-second hook and removes a duplicated ADC read per
second. Also, TSU6721 is now reset after every detachment. This way, we
don't suffer from TSU6721 dirty state (most commonly seen after OTG
dongle detached.)

BUG=chrome-os-partner:17928
TEST=1. Test plugging/unplugging video dongle.
     2. Test Toad cable mode switching.
     3. Test charging with 200K charger.
BRANCH=spring

Change-Id: Ic035b7332e07ca385d766c735ce39efd31e46034
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49578
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

stm32: Fix ADC watchdog bug and extend sample time

This fixes a bug in ADC watchdog that sample sequence is not set before
enabling ADC watchdog. Also, current sample time isn't long enough for
some weakly driven net. This extends ADC sample time to 13.5 cycles.

BUG=chrome-os-partner:17928
TEST=Test with Toad cable and video dongle on Spring
BRANCH=spring

Change-Id: Iecdfd4aada4e974225a41144e213e92897f4797b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49680
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Split x86_power.c into Ivybridge and Haswell variants

The voltage rails, inputs, and sequencing is completely different. Easiest
to just handle it separately for each chipset.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Built Link, still works.

Change-Id: Ibf26ef47cdf2284b7bfb3a2e5ccfb6841aba5ac6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49559
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Put a copy of test binaries under build/${BOARD}

This puts a copy of test binaries at build/${BOARD}/test-*.bin. This way
it is easier for us to get all test binaries.

BUG=chrome-os-partner:19057
TEST='make tests' and check build/${BOARD}/test-*.bin
BRANCH=None

Change-Id: I8394cea6bee95f00fc01d725d2494ca5e222f47d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49608
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Split STM32 i2c implementation for STM32F vs STM32L

STM32L doesn't need the DMA-based workarounds needed by STM32F, since
the STM32L I2C block isn't broken.  DMA adds a lot of code overhead
when transferring 2-3 bytes, and is implemented differently on STM32F
vs STM32L so it doesn't even work on STM32L

Add a simple polled I2C implementation for STM32L.  This is not the
final implementation, which will use interrupts, but for now it works,
unlike the DMA-based version.

BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on pit finds a device at 0x90

Change-Id: Ie2a6c9ac6f62b7fd3c35e313b4015e080d9f937a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49555

add option to de-activate EC console input when WP is on

With a Toad cable, the user can access the EC serial console through the
micro-B connector.
We probably need to de-activate the input on the EC serial console when
the Write-Protect is on, since we have fairly "powerful" commands on the
EC command-line.
Add a new CONFIG_CONSOLE_RESTRICTED_INPUT on platforms with externally
accessible EC serial port.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=spring
BUG=chrome-os-partner:18716
TEST=on Spring with CONFIG_CONSOLE_RESTRICTED_INPUT set, try with and without
write-protect, use successfully the EC console in the former case, and see
"Console is DISABLED" in the latter case.

Change-Id: Ic9646d5468183f4d8f94b5e5e1d2a727941d7bbe
Reviewed-on: https://gerrit.chromium.org/gerrit/49537
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>

Move i2cread and i2cwrite functions to i2c_common

Also moves the handy i2cscan command to i2c_common.  The
platform-dependent interface is now i2c_xfer().

Still more to do in follow-up CLs; for example, i2c_read_string() has
platform-dependent implementation, and the i2c/i2cread console
commands aren't common yet.

BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on link, spring

Change-Id: Ia53d57beaa157bece293a4262257e20b4107589e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49492
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Daniel Erat <derat@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>

Fix ADC test for LM4

LM4 doesn't have implementation of adc_read_all_channels(). Let's use
adc_read_channel() in this case.

BUG=chrome-os-partner:18598
TEST=Build stress test for link. See no error about
adc_read_all_channels() undefined.
BRANCH=None

Change-Id: I5b13384468667cbd17b83faab9f9d3fdc48de91d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49589
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Handle battery charged alarm

When battery flags TERMINATE_CHARGE or OVER_CHARGED alarm, we should
treat them as a signal of battery fully charged.

BUG=chrome-os-partner:18914
TEST=On Spring:
       1. Plug in adapter when battery if full, see green LED.
       2. Plug in adapter when battery is not full, see yellow LED.
BRANCH=spring

Change-Id: Ica414a0e1667b8f30a0cc9a5d66dba1b119a59ba
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49456
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Add cscope.out to .gitignore

With this, git doesn't complain about uncommited change if one uses
cscope.

BUG=none
TEST='git status' and see no uncommited change.
BRANCH=none

Change-Id: I30bb78e4d0a7541444ef1aced683335933a5aa73
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49457
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Clean up gaia_power debug messages

Should use CPRINTF("[%T...\n]") so the messages are timestamped; this
is really helpful to see when things are going wrong.

No functional changes; just changing debug output.

BUG=none
BRANCH=none
TEST=build pit and spring; see prettier debug output

Change-Id: I9c658385b836a184a3ebb84856b844cbfc3224a7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49551
Reviewed-by: Simon Glass <sjg@chromium.org>

Don't enable charger interrupt if charger task is disabled

This fixes pmu_init() failing on pit, where the charger task isn't
enabled yet (and thus the charger interrupt is NULL - which can't be
enabled).

BUG=chrome-os-partner:18657
BRANCH=none
TEST=build all platforms; on pit, check that pmu_init() no longer fails

Change-Id: I191bbaeb4df10241e3508ccf7ef5ea83f42c5697
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49550
Reviewed-by: Simon Glass <sjg@chromium.org>

Improved the BUILD_ASSERT macro to work outside of functions.

This will let us check the size of static array initializers.

Also moved this macro definition and ARRAY_SIZE into a new "tricks.h"
header, so that userspace utils can use it too.

BUG=none
BRANCH=none
TEST=manual

Built everything, tested on Link. Tried various assertions.

Change-Id: I612891108ea37dbca3572e0f25ab54a7bc0ed860
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49417
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Fix charging state descriptions

Two states were added, but the descriptions weren't.  This caused a crash.

BUG=chrome-os-partner:18914
TEST=boot spring with no battery, wait a few secs; shouldn't crash
BRANCH=spring

Change-Id: I10f9280232259a1f467ea3b02f3b1b61cee57471
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49391

spring: Enable both VFET2 and VFET4 for video

We are moving video power from VFET2 to VFET4. To support old boards, we
need to enable both of them. When new boards are in place, we can then
drop VFET2.

BUG=chrome-os-partner:18186
TEST=Build spring
BRANCH=spring

Change-Id: If0cbc1ac49affc1e3c7ec9650a661f80be826f97
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49431
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Make test-list a per-board parameter

Some tests are not applicable to all boards. This change makes test-list
a per-board parameter so a test can be enabled/disabled for individual
boards. Also disable all the tests that don't compile now.

BUG=chrome-os-partner:18598
TEST=make tests for all boards
BRANCH=None

Change-Id: Id2d18e23856f5c64dbdc7c6ca5949f8ad61b5cc0
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49452

Remove mock files

We are moving to a per-function mock mechanism, which is less likely to
break when someone adds a function to a file with a mock.

BUG=chrome-os-partner:18598
TEST=None
BRANCH=None

Change-Id: Ie625064730d2224accbaf1febbdc4750e793d047
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49451

Fix kb_scan test when CONFIG_LID_SWITCH is not defined

If we don't have lid switch, don't test it.

BUG=chrome-os-partner:18598
TEST=Build on mccroskey and see errors about GPIO_LID_OPEN go away.
BRANCH=None

Change-Id: I1084e1bfc2e6bd611dc393c1b2d501e786d2a0e3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49450

Fill in I2C test parameters

This fills in test parameters for link, pit, snow, and daisy. Also fixes
compilation error due to CONFIG_ADC not defined.

BUG=chrome-os-partner:18598
TEST=Build test-stress. (Link failed due to unrelated issue.)
BRANCH=None

Change-Id: I8a5cfcf4acdae607c23dbe5cf3378945f91c7807
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49449

Add 'clobber' target to Makefile to clean everything.

BUG=none
BRANCH=none
TEST=manual

  make BOARD=link
  make BOARD=snow
  make clobber

Change-Id: I862ec0d0240e48828091259dee7e8aef62544d47
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49370
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Add 'TAGS' target to Makefile

This creates cscope.files and an emacs TAGS file for the specified BOARD. If
you don't have etags installed, it just creates cscope.files.

BUG=none
BRANCH=none
TEST=manual

  make BOARD=link tags
  ls

Change-Id: I9b27ba42ac4e85822c5a5a6e8cb5b5148a3435c3
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49356
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Split pwm.c into pwm_fan.c and pwm_kblight.c

Sadly, the existence of fans may not always imply the existence of keyboard
backlights.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

Use the Link EC console to make sure that both functions still behave.

  faninfo
  fanset 4400
  faninfo
  fanset 9999
  faninfo
  autofan
  faninfo
  fanduty 50
  faninfo
  fanduty 100
  faninfo
  autofan

  kblight 0
  kblight 100
  kblight 50
  kbligth 100

Change-Id: I2e07cd46c21bce2d0d4162275a8ea6ae40135e96
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49355

Rename i2c_commands.c to i2c_common.c

It will soon have cross-platform code moved to it.

This CL just does the renaming; no functional changes.

BUG=chrome-os-partner:18969
BRANCH=none
TEST=build spring,link

Change-Id: I8cc475f9dd1422a0a9c586c93eb0d7aaf21a001d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49359
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Allow disabling PMU charger task, and do so on pit

I2C communication doesn't work on pit yet, so the charger task is
spewing errors to the console.  This change allows the task to be
disabled cleanly on pit, and has no effect on other platforms.

BUG=chrome-os-partner:18657
BRANCH=none
TEST=build all platforms and see that charger task is still compiled
     everywhere but pit

Change-Id: I788e817d5630fb1a28694819f4ef9948a503a744
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49344
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Move PMU charger irq handler to charger module

No code changes; this is just moving the irq to the module which
actually handles it.  This makes it simpler to disable the charger
task separately from the PMU module.

BUG=chrome-os-partner:18343
BRANCH=none
TEST=build pit, spring

Change-Id: Ife44a17f69bf21aa000d162318a459cea6fdf661
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49334
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

Increase UART output buffer on STM32L

STM32L has 16KB RAM, so can use a bigger output buffer.

BUG=chrome-os-partner:18657
BRANCH=none
TEST=boot pit, look at EC console output; shouldn't drop output

Change-Id: I8a3c7ff2923fd815eff748a898dc873f5d86b46c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49332
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Add pit support to flash_ec

Pit flashes the same way daisy does.

BUG=chrome-os-partner:18657
BRANCH=none
TEST=./util/flash_ec --board=pit --ro --image=build/pit/ec.bin

Change-Id: Id3db86b348963f66e7eb03c38a8efabe3379d21b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49320
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

spring: Show yellow LED when not fully charged

This includes two situations:
  1. When charge state machine is still trying to decide the next state.
  2. When we are waiting for acceptable condition to start charging.

For now, we show yellow for both.

BUG=chrome-os-partner:18914
TEST=none
BRANCH=spring

Change-Id: I5dd97c735a1ecfee29d506452695014c85d2da0b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49327
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

Add new TPS65090 charge state REINIT and BAD_COND

Currently INIT state can mean different things. This change introduces
two new states to demultiplex INIT. Now, REINIT means charge state
machine is deciding the next state. BAD_COND means it's waiting for
acceptable charging condition. Note that the three states are doing the
same thing so there is no functional change.

BUG=chrome-os-partner:18914
TEST=none
BRANCH=spring
CQ-DEPEND=CL:49327

Change-Id: Ia783e76cf27e28103ef44fe7b8a43674dadccc54
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49326
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

stm32: do not enable interrupts on I2C1

We don't have any interrupt handler for I2C1, so enabling of the I2C1
interrupts will just end up triggering a panic everytime the interrupt
fires.
By the way, I2C1 is used as master and all communications happen without
using the I2C interrupt.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=spring
BUG=chrome-os-partner:18499
TEST=On Spring, run EC flashing in a loop from the AP
while true
do
        flashrom --fast-verify -p internal:bus=lpc -w ec.bin
        flashrom --fast-verify -p internal:bus=lpc -w ec_autest_image.bin
done
and check that we always succeed and have no panic.

Original-Change-Id: I6b071f309218410840707380d296bdf14b10e9f5
Reviewed-on: https://gerrit.chromium.org/gerrit/47749
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 8b3262d644003b3c9727998dc8d4b0c749450aef)

Change-Id: Ie2fc30e5661e7eade024e6893eaf16427f94cac2
Reviewed-on: https://gerrit.chromium.org/gerrit/49192
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>

Split out power button code from switch.c

The power button code is platform-independent.  This change splits the
code out of the LM4 switch.c module so that a subseqent change to
STM32 platforms can start using it.

BUG=chrome-os-partner:18945
BRANCH=none
TEST=manual

1. Power+refresh+esc goes to recovery mode,
2. Press power button at recovery screen turns off.
3. With system off, power button turns system on.
4. Press power button for a second; screen locks.
5. Press power button while typing; blocks keystrokes while it's pressed.
6. Hold power button down for 8 sec; system forced to shutdown.
7. From EC console, with system on:
   hostevent clear
   hostevent -> event 0x04 is clear
   press power button
   hostevent -> event 0x04 is set
8. From EC console, with system off:
   powerbtn -> system turns on
   powerbtn 5000 -> system turns off, just like power button was held for 5 sec

Change-Id: If2a9b02514a201e1d03c857d128e2ccab51a16ef
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49217
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

Create board directory for Slippy.

This just copies the board/link stuff into board/slippy (with one formatting
tweak to pass the presubmit check). It builds, but of course is useless.
Customization will follow later.

BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual

  cd src/platform/ec
  make BOARD=slippy

Change-Id: I2ba62812d9199eec776f9da6732921c6281762ab
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49130
Reviewed-by: Randall Spangler <rspangler@chromium.org>

Temporarily enable all FETs at chipset poweron

This will allow debugging until the I2C passthru command is supported,
and should be removed once it is supported.

BUG=chrome-os-partner:18778
BRANCH=pit
TEST=build pit; can't test until we have boards

Change-Id: I6285e76763a5f3bfd759161115d4905697b56e6c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49096
Reviewed-by: Doug Anderson <dianders@chromium.org>

Fix typo in power_led.c

Should be BOARD_pit, not BOARD_PIT (Thanks, Doug!)

BUG=none
BRANCH=pit
TEST=build pit

Change-Id: I1d7ef9e2347f031aec8f94c7a2da87145aa83c4d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49111
Reviewed-by: Doug Anderson <dianders@chromium.org>

Move LPC constants of out board.c and into chipset where they belong

These should be specific to the lm4's lpc.c, not the board.

BUG=chrome-os-partner:18343
TEST=build all, run link
BRANCH=none

Change-Id: Ie02bbd3cf90f09035d302f5dcaad4d33f4ef9e7c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49101